"blahblah_nospam@sbcglobal.net"
> The SPD chip on most memory modules is set to JEDEC
> standards, regardless of the module's actual speed and
> timing capabilities. Manufacturers do this so they can
> maintain compliance with JEDEC standards. A system bios
> (in auto mode) simply reads whatever timings are stored on
> the SPDs, and it's up to the end-user to override these
> default timings.
>
> Also, whether a module needs extra voltage to achieve its
> rated speed specs depends on the memory chips used in
> the module. Some chips need a voltage boost, others don't.
> For this reason manufacturers have begun specifying a
> voltage range for a given module (e.g. 3.1-3.3V) instead of
> a single number.

Interesting, thanks for that. Now if only the actual SPD timings would be
listed by the manufacturers.

Jon