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  #1 (permalink)  
Old 10-16-2008, 11:31 AM
Lothar of the Hill People
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Default Best way to mix DIMMs of different CAS latencies?

As I posted in another thread here, I have a new system that has at
least one bad RAM DIMM, and the vendor has sent me several replacement
sticks for troubleshooting purposes. No matter how I swap and
reposition the DIMMs, the bad memory error messages that I'm getting
are failing to help me narrow it down to just one DIMM (it's not worth
going into the details here, but suffice it to say that tech support
is as stumped as I am), and it's possible that I have *two* bad DIMMs.
At the very least, I have narrowed it down to two of the original
DIMMs that are definitely working fine, and am debating whether it's
worth the effort to troubleshoot it any further, given that I have
free replacements that I can use.

The problem is that the original DIMMs have a CAS latency of 555, and
the replacements are a slower 666. These are 1GB DDR2 ECC SDRAM
modules (x4 for a total of 4GB).

My question is, what is the best way to mix and match these DIMMS in
my 4 memory slots? Here are my options:

1) Continue the troubleshooting and try to narrow down the bad memory
to a single DIMM, and then use three 555 DIMMs plus one 666 DIMM.

2) Don't bother with any further troubleshooting, assume that I have
two bad DIMMs, and use two 555 DIMMs plus two 666 DIMMs

3) Replace all of the DIMMs with the slower 666 DIMMs so that they are
all the same spec.

Which of the above three options will give me the best performance (if
there would even be any noticeable difference), and in what order
should I arrange the DIMMs in the four slots for either options 1 or
2?

According to my system's manual, DIMMs should be installed first into
DIMMs 1 and 2, then any additional DIMMs into 3 and 4, so that is how
the slots are paired.

Lothar

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  #2 (permalink)  
Old 10-16-2008, 12:44 PM
Paul
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Default Re: Best way to mix DIMMs of different CAS latencies?

Lothar of the Hill People wrote:
> As I posted in another thread here, I have a new system that has at
> least one bad RAM DIMM, and the vendor has sent me several replacement
> sticks for troubleshooting purposes. No matter how I swap and
> reposition the DIMMs, the bad memory error messages that I'm getting
> are failing to help me narrow it down to just one DIMM (it's not worth
> going into the details here, but suffice it to say that tech support
> is as stumped as I am), and it's possible that I have *two* bad DIMMs.
> At the very least, I have narrowed it down to two of the original
> DIMMs that are definitely working fine, and am debating whether it's
> worth the effort to troubleshoot it any further, given that I have
> free replacements that I can use.
>
> The problem is that the original DIMMs have a CAS latency of 555, and
> the replacements are a slower 666. These are 1GB DDR2 ECC SDRAM
> modules (x4 for a total of 4GB).
>
> My question is, what is the best way to mix and match these DIMMS in
> my 4 memory slots? Here are my options:
>
> 1) Continue the troubleshooting and try to narrow down the bad memory
> to a single DIMM, and then use three 555 DIMMs plus one 666 DIMM.
>
> 2) Don't bother with any further troubleshooting, assume that I have
> two bad DIMMs, and use two 555 DIMMs plus two 666 DIMMs
>
> 3) Replace all of the DIMMs with the slower 666 DIMMs so that they are
> all the same spec.
>
> Which of the above three options will give me the best performance (if
> there would even be any noticeable difference), and in what order
> should I arrange the DIMMs in the four slots for either options 1 or
> 2?
>
> According to my system's manual, DIMMs should be installed first into
> DIMMs 1 and 2, then any additional DIMMs into 3 and 4, so that is how
> the slots are paired.
>
> Lothar


FBDIMM Northbridges have multiple channels. For example, a 5400 might
have four channels. Multiple FBDIMMs can be connected to a channel,
I believe up to eight of them. When using multiple FBDIMMs in the
same channel, the access latency increases, for the DIMMs that are
further from the memory controller. The upper diagram here, used
riser cards to house that many DIMMs.

Channel1 -----X--X--X--X--X--X--X--X A "max config"
Channel2 -----X--X--X--X--X--X--X--X FBDIMM
Channel3 -----X--X--X--X--X--X--X--X server
Channel4 -----X--X--X--X--X--X--X--X motherboard (256GB)

Channel1 -----X Intel
Channel2 -----X Skulltrail
Channel3 -----X D5400XS
Channel4 -----X

Channel1 -----X--X Asus
Channel2 -----X--X Z7S WS
Channel3 -----X
Channel4 -----X

You should be able to test the DIMMs one at a time. On the
Asus motherboard, the first channel and first slot, are
used when only one DIMM is present. Obviously, you
cannot put a DIMM in the second slot all by itself,
because there would not be continuity of the electrical
signals from that AMB to the Northbridge. So DIMM population
in these systems is serialized. To use slot 8 in
the upper diagram, slots 1 through 7 would need
to be filled. Fill from left to right.

I don't have any experience with FBDIMMs, but it would
seem to me, if the BIOS feels the need to balance the
access times of multiple DIMMs, then it can program
each AMB for CAS6, or any CAS that doesn't violate the
timing specs of the chips. (So the "slowest module" rules.)

At this point, I don't see a reason to discard the
dis-similar DIMMs. I think my main concern would be,
that any warranty replacements should be honored with
similar product. Having been given crap RAM by a retailer,
as part of satisfying the terms of an original purchase,
I've been through this before. And unfortunately,
I did not have time to get them to do the right
thing, and I had to spend a couple hundred dollars
just before closing time at a local computer shop,
to keep a project on time.

You could have any number of problems with the motherboard,
that would show memory errors with all the DIMMs.

Another thing to keep in mind, is FBDIMMs now come in
1.8V and 1.5V versions. There is some deal about AMBs
that run at reduced voltage, which helps keep the
module temperature down. I doubt very much, you've been
given the wrong kind of modules. But it could be something
voltage related that is causing the problem. It is
even possible there are three kinds of modules -
1.8V AMB with 1.8V memory, 1.5V AMB with 1.8V memory,
and 1.5V AMB with 1.5V (DDR2) memory. (I saw an announcement
of reduced voltage DDR2 chips the other day, which is where
my suspicion comes from. Such DDR2 chips would only make
sense on an FBDIMM.) You'd have to do a search
using your motherboard model number, to see what module
types are recommended.

http://www.crucial.com/server/eememory.aspx

There is also some deal about FSB1600 and DDR2-800
FBDIMMs, that I don't recollect off hand. (Perhaps
a person only gets to use DDR2-800, when using an
FSB1600 processor or something? Possibly that was
product specific.)

Paul

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  #3 (permalink)  
Old 10-16-2008, 01:02 PM
Lothar of the Hill People
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Default Re: Best way to mix DIMMs of different CAS latencies?

On Thu, 16 Oct 2008 08:44:28 -0400, Paul <nospam@needed.com> uttered
like so:

>I don't have any experience with FBDIMMs, but it would
>seem to me, if the BIOS feels the need to balance the
>access times of multiple DIMMs, then it can program
>each AMB for CAS6, or any CAS that doesn't violate the
>timing specs of the chips. (So the "slowest module" rules.)
>
>At this point, I don't see a reason to discard the
>dis-similar DIMMs.


Thanks again for the very useful info, Paul.

Let's assume for the sake of argument that there is no problem with
the motherboard, no voltage incompatibility issues, and no warranty
issues (the vendor, Dell, has been bending over backwards to help me
with this issue and has been extremely cooperative, probably because I
have a top-tier support plan, but possibly also because I bought such
an expensive system, and I buy a lot of business computers from them
and they want to keep my business!).

If I do keep some of the original faster DIMMs, then can anybody tell
me in what configuration they think I should mix them with the
replacement DIMMs? I have enough of these DIMMs now that I can mix
and match them pretty much any way that I want to, as long as at least
one of them is a slower-latency DIMM. I've wasted so much time
troubleshooting that I don't really want to spend any more time on it,
as long as I can get it to work error-free with minimal impact on
performance.

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  #4 (permalink)  
Old 10-16-2008, 01:59 PM
Paul
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Default Re: Best way to mix DIMMs of different CAS latencies?

Lothar of the Hill People wrote:
> On Thu, 16 Oct 2008 08:44:28 -0400, Paul <nospam@needed.com> uttered
> like so:
>
>> I don't have any experience with FBDIMMs, but it would
>> seem to me, if the BIOS feels the need to balance the
>> access times of multiple DIMMs, then it can program
>> each AMB for CAS6, or any CAS that doesn't violate the
>> timing specs of the chips. (So the "slowest module" rules.)
>>
>> At this point, I don't see a reason to discard the
>> dis-similar DIMMs.

>
> Thanks again for the very useful info, Paul.
>
> Let's assume for the sake of argument that there is no problem with
> the motherboard, no voltage incompatibility issues, and no warranty
> issues (the vendor, Dell, has been bending over backwards to help me
> with this issue and has been extremely cooperative, probably because I
> have a top-tier support plan, but possibly also because I bought such
> an expensive system, and I buy a lot of business computers from them
> and they want to keep my business!).
>
> If I do keep some of the original faster DIMMs, then can anybody tell
> me in what configuration they think I should mix them with the
> replacement DIMMs? I have enough of these DIMMs now that I can mix
> and match them pretty much any way that I want to, as long as at least
> one of them is a slower-latency DIMM. I've wasted so much time
> troubleshooting that I don't really want to spend any more time on it,
> as long as I can get it to work error-free with minimal impact on
> performance.


Download the datasheet for your chipset. For example, I downloaded the
5400 datasheet from here, and in Section 5.3 "System Memory Controller"
PDF page 193, it gives details on channels and branches.

http://www.intel.com/Products/Server...ldocuments.htm

"Branch channels are paired together in lock step to match FSB
bandwidth requirement."

You know what chipset you've got on that motherboard, so "salt to taste".

If it is a 5400, I'd do this.

Channel1 CAS5
Channel2 CAS5
Channel3 CAS6
Channel4 CAS6

You can use CPUZ, if you want a quick check on some of your
hardware details. This program runs under Windows. Otherwise,
the Dell site usually has an overview of the hardware on
your machine. I've looked up a number of their products there.

http://www.cpuid.com/cpuz.php

Paul

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  #5 (permalink)  
Old 10-16-2008, 05:10 PM
Lothar of the Hill People
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Posts: n/a
Default Re: Best way to mix DIMMs of different CAS latencies?

On Thu, 16 Oct 2008 09:59:33 -0400, Paul <nospam@needed.com> uttered
like so:

>Download the datasheet for your chipset. For example, I downloaded the
>5400 datasheet from here, and in Section 5.3 "System Memory Controller"
>PDF page 193, it gives details on channels and branches.
>
>http://www.intel.com/Products/Server...ldocuments.htm
>
> "Branch channels are paired together in lock step to match FSB
> bandwidth requirement."
>
>You know what chipset you've got on that motherboard, so "salt to taste".
>
>If it is a 5400, I'd do this.
>
> Channel1 CAS5
> Channel2 CAS5
> Channel3 CAS6
> Channel4 CAS6
>
>You can use CPUZ, if you want a quick check on some of your
>hardware details. This program runs under Windows. Otherwise,
>the Dell site usually has an overview of the hardware on
>your machine. I've looked up a number of their products there.
>
>http://www.cpuid.com/cpuz.php
>
> Paul



I do indeed have a 5400 chipset (5400B, specifically), so your example
and URL above was extremely helpful!

I studied the diagrams on pages 295-296 of that PDF you cited, and
there is one thing that is confusing me, being that I am a non-memory
expert: I am unclear what the difference is between Channels and
Branches as they relate to the slot numbering on my motherboard.

My motherboard does not look anything like the layout in those
diagrams (which I know are only meant to be schematic, but they're
still confusing me). My motherboard has 8 slots all in a row,
numbered Slot 1 thru Slot 8. Slots 1-4 have white clips, and slots
5-8 have black clips. The Dell user manual for my computer system
says to fill the slots in sequential numerical order as they are
labeled, starting with #1. The system came from the factory with
slots #1-4 filled, and #5-8 empty.

The Intel document, however, says that I'll get best performance if I
fill the slots in an order that seems to be different from what the
system manual is describing.

Can you explain to me which channels and branches correspond to each
of my board's 8 slots?

One other thing... I have a 32-bit OS (Windows XP Pro), so only 3GB of
my memory is available to the OS. Is the additional 1GB that is
reserved for non-OS functions coming off of one dedicated DIMM, or is
it being spilt among all 4?

Thanks again, Paul.

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  #6 (permalink)  
Old 10-16-2008, 06:35 PM
Mike Walsh
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Default Re: Best way to mix DIMMs of different CAS latencies?




Lothar of the Hill People wrote:
>
> One other thing... I have a 32-bit OS (Windows XP Pro), so only 3GB of
> my memory is available to the OS. Is the additional 1GB that is
> reserved for non-OS functions coming off of one dedicated DIMM, or is
> it being spilt among all 4?


You can address only the first 3 GB of memory; the memory above 3 GB is not used at all.
The reason that you can use only 3 GB memory is the address space above 3 GB is use for other purposed; I have read that it is used to address other hardware devices such as PCI, PATA, etc..

--
Mike Walsh

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  #7 (permalink)  
Old 10-16-2008, 07:00 PM
Lothar of the Hill People
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Posts: n/a
Default Re: Best way to mix DIMMs of different CAS latencies?

On Thu, 16 Oct 2008 14:35:28 -0400, Mike Walsh
<spam_sucks@bellsouth.net> uttered like so:

>
>
>
>Lothar of the Hill People wrote:
>>
>> One other thing... I have a 32-bit OS (Windows XP Pro), so only 3GB of
>> my memory is available to the OS. Is the additional 1GB that is
>> reserved for non-OS functions coming off of one dedicated DIMM, or is
>> it being spilt among all 4?

>
>You can address only the first 3 GB of memory; the memory above 3 GB is not used at all.
>The reason that you can use only 3 GB memory is the address space above 3 GB is use for other purposed; I have read that it is used to address other hardware devices such as PCI, PATA, etc..


Thanks, Mike. I was under the impression that a 32-bit system *can*
use more than 3GB (up to 3.5GB), depending on how the system is
configured. I have another system with 4GB installed, and in the
System Properties window it says that I have 3.25GB of RAM. A
different system, with the same amount of memory installed, says that
I have 3.0GB.

I didn't realize that the leftover amount was completely unused for
any purpose though.

In any case, the question remains whether the unused memory is
partitioned off into one entire 1GB DIMM, or are all 4 DIMMs are still
partially used? In other words, is there any point at all to having 4
1GB DIMMs installed in a system that can only use 3GB, or can I remove
one of them to keep it protected as a spare?

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  #8 (permalink)  
Old 10-17-2008, 05:16 AM
Paul
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Default Re: Best way to mix DIMMs of different CAS latencies?

Lothar of the Hill People wrote:

> I do indeed have a 5400 chipset (5400B, specifically), so your example
> and URL above was extremely helpful!
>
> I studied the diagrams on pages 295-296 of that PDF you cited, and
> there is one thing that is confusing me, being that I am a non-memory
> expert: I am unclear what the difference is between Channels and
> Branches as they relate to the slot numbering on my motherboard.
>
> My motherboard does not look anything like the layout in those
> diagrams (which I know are only meant to be schematic, but they're
> still confusing me). My motherboard has 8 slots all in a row,
> numbered Slot 1 thru Slot 8. Slots 1-4 have white clips, and slots
> 5-8 have black clips. The Dell user manual for my computer system
> says to fill the slots in sequential numerical order as they are
> labeled, starting with #1. The system came from the factory with
> slots #1-4 filled, and #5-8 empty.
>
> The Intel document, however, says that I'll get best performance if I
> fill the slots in an order that seems to be different from what the
> system manual is describing.
>
> Can you explain to me which channels and branches correspond to each
> of my board's 8 slots?
>
> One other thing... I have a 32-bit OS (Windows XP Pro), so only 3GB of
> my memory is available to the OS. Is the additional 1GB that is
> reserved for non-OS functions coming off of one dedicated DIMM, or is
> it being spilt among all 4?
>
> Thanks again, Paul.


I'm still working in the dark here, but I'll take a guess on your
eight slot configuration.

Channel1 -----X--Y
Channel2 -----X--Y
Channel3 -----X--Y
Channel4 -----X--Y

You fill the X slots first, because they are connected directly
to the Northbridge. For a Y slot to work, the X next to it
has to be present (due to the daisy chain of serial interconnect).

The X slots will be one color. The Y slots will be a different
color. (Note - color is not a reliable indicator, because some
manufactured batches may choose to use all the same color for
the slots. If on a given morning, they run out of the two color
schemes, they won't stop the production line until they get
more of the second color. So you cannot rely on color, as
a motherboard manufacturer can change color schemes in order
to keep the production line running. When you make 5 million
motherboards a month... "**** happens".)

You can look at the Asus manual, to see their instructions for
RAM fill. This is the downloadable manual for a Z7S WS.

http://dlcdnet.asus.com/pub/ASUS/ser...848_z7s_ws.pdf

Channel1 -----00--01
Channel2 -----10--11
Channel3 -----20
Channel4 -----30

To fill with one DIMM, for some reason they insist on channel 1.

Channel1 -------00----<none>
Channel2 -----<none>--<none>
Channel3 -----<none>
Channel4 -----<none>

To fill with two DIMMs

Channel1 -------00------01
Channel2 -----<none>--<none>
Channel3 -----<none>
Channel4 -----<none>

or

Channel1 -------00----<none>
Channel2 -------10----<none>
Channel3 -----<none>
Channel4 -----<none>

To fill with four DIMMs

Channel1 -------00------01
Channel2 -------10------11
Channel3 -----<none>
Channel4 -----<none>

or

Channel1 -------00----<none>
Channel2 -------10----<none>
Channel3 -------20
Channel4 -------30

For six DIMMs, fill all slots (Z7S is a six slot board).

It would appear that Channel1 and Channel2 work
in lockstep. And Channel3 and Channel4 are working
as their own set in lockstep. I'll have to
assume, that when Dell numbered the slots, that
two consecutive slot numbers, are working together.
That is why I drew it like this.

Channel1 CAS5
Channel2 CAS5
Channel3 CAS6
Channel4 CAS6

Paul

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  #9 (permalink)  
Old 10-17-2008, 10:52 AM
Lothar of the Hill People
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Posts: n/a
Default Re: Best way to mix DIMMs of different CAS latencies?

On Fri, 17 Oct 2008 01:16:15 -0400, Paul <nospam@needed.com> uttered
like so:

>
>I'm still working in the dark here, but I'll take a guess on your
>eight slot configuration.
>
> Channel1 -----X--Y
> Channel2 -----X--Y
> Channel3 -----X--Y
> Channel4 -----X--Y
>
>You fill the X slots first, because they are connected directly
>to the Northbridge. For a Y slot to work, the X next to it
>has to be present (due to the daisy chain of serial interconnect).
>
>The X slots will be one color. The Y slots will be a different
>color. (Note - color is not a reliable indicator, because some
>manufactured batches may choose to use all the same color for
>the slots. If on a given morning, they run out of the two color
>schemes, they won't stop the production line until they get
>more of the second color. So you cannot rely on color, as
>a motherboard manufacturer can change color schemes in order
>to keep the production line running. When you make 5 million
>motherboards a month... "**** happens".)
>
>You can look at the Asus manual, to see their instructions for
>RAM fill. This is the downloadable manual for a Z7S WS.
>
>http://dlcdnet.asus.com/pub/ASUS/ser...848_z7s_ws.pdf
>
> Channel1 -----00--01
> Channel2 -----10--11
> Channel3 -----20
> Channel4 -----30
>
>To fill with one DIMM, for some reason they insist on channel 1.
>
> Channel1 -------00----<none>
> Channel2 -----<none>--<none>
> Channel3 -----<none>
> Channel4 -----<none>
>
>To fill with two DIMMs
>
> Channel1 -------00------01
> Channel2 -----<none>--<none>
> Channel3 -----<none>
> Channel4 -----<none>
>
> or
>
> Channel1 -------00----<none>
> Channel2 -------10----<none>
> Channel3 -----<none>
> Channel4 -----<none>
>
>To fill with four DIMMs
>
> Channel1 -------00------01
> Channel2 -------10------11
> Channel3 -----<none>
> Channel4 -----<none>
>
> or
>
> Channel1 -------00----<none>
> Channel2 -------10----<none>
> Channel3 -------20
> Channel4 -------30
>
>For six DIMMs, fill all slots (Z7S is a six slot board).
>
>It would appear that Channel1 and Channel2 work
>in lockstep. And Channel3 and Channel4 are working
>as their own set in lockstep. I'll have to
>assume, that when Dell numbered the slots, that
>two consecutive slot numbers, are working together.
>That is why I drew it like this.
>
> Channel1 CAS5
> Channel2 CAS5
> Channel3 CAS6
> Channel4 CAS6
>
> Paul



Thanks for that insight, Paul. I guess I should just assume that Dell
arranged the slots in the correct order that they should be filled,
even though they don't seem to match the order on Intel's diagram. In
your ordering at the very end of your above quote (you're recommended
install order), I assume you meant that you would install like this if
you were me:

Slot 1 CAS5
Slot 2 CAS5
Slot 3 CAS6
Slot 4 CAS6

I'm ignoring the word "Channel" because I still have no idea how it
corresponds with Dell's slot numbering.

In any case, this discussion may be all moot, if what somebody else
told me today on another forum is correct (this guy seems to know his
stuff regarding memory, as you obviously do). He said that my system
will run with the latency of the slowest DIMM installed in my system,
no matter what all the other DIMMs are. Do you concur? Is there any
way for me to find out?

I noted that when I run that CPUZ software that you recommended
earlier... it has the following entry under the "Memory" tab (with the
DIMMs installed as you noted above):

CAS# Latency (CL) 6.0 clocks
RAS# to CAS# Delay (tCRD): 6 clocks
RAS# Precharge (tRP): 6 clocks

Does this mean that it is monitoring the system as running at CAS6
overall? If that's the case, then maybe it doesn't matter at all what
order I install the DIMMs, and I might as well flip a coin to decide
which one to install in which slot, and which ones to send back to
Dell.

Wait, here's something else I just discovered... In the product
brochure for the Samsung DDR2 SSDRAM FBDIMMs...

..., it lists the following under "Features":

- Posted CAS
- Programmable CAS Latency: 3, 4, 5, 6

I don't see any other discussion anywhere in the technical documents
about how this "programming" is accomplished (i.e., is it
user-programmable, or is it shipped set locked at a particular latency
from the factory, or does it set itself according to what it detects
in my system?).

If it is programmable, then I also don't understand why anybody would
want to set it at a slower latency than its fastest setting. Maybe
I'm just not understanding what they mean by "programmable" here.

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  #10 (permalink)  
Old 10-17-2008, 12:39 PM
Paul
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Default Re: Best way to mix DIMMs of different CAS latencies?

Lothar of the Hill People wrote:

>
>
> Thanks for that insight, Paul. I guess I should just assume that Dell
> arranged the slots in the correct order that they should be filled,
> even though they don't seem to match the order on Intel's diagram. In
> your ordering at the very end of your above quote (you're recommended
> install order), I assume you meant that you would install like this if
> you were me:
>
> Slot 1 CAS5
> Slot 2 CAS5
> Slot 3 CAS6
> Slot 4 CAS6
>
> I'm ignoring the word "Channel" because I still have no idea how it
> corresponds with Dell's slot numbering.


I'm assuming the chipset has four channels, your board has four DIMM
slots, and the most logical assignment is one DIMM per channel. In
fact, if Dell wanted, they could leave the bottom two channels unused,
and connect two DIMMs to each of the upper channels. One of the
early articles I read on the performance of these four channel systems,
claimed they didn't see a change in memory bandwidth, between those
two options, which at the time I didn't believe for one minute :-)

If all four channels are used, they are split into two groups. Intel
calls them branch0 and branch1. Branch0 contains the first two channels,
to be operated in lockstep. Branch1 contains the second two channels,
to be operated in lockstep. I don't see any mention in the Intel documentation,
that all channels must operate in lockstep, but because I've designed
hardware, I understand the need for simplicity, in the interest of
reducing chip simulation and verification during design. Adding
degrees of freedom to hardware, costs significant time and money.
Our chip verification team was constantly behind schedule, and
were still doing verification when the design was sent to fab.
A little stupid, but that is how the game is played.

So running them all at CAS6, makes a lot of sense. It is the
fact that the Intel documentation did not go the extra mile, and
say just that, that made me hedge my bets by drawing the above
diagram. If you must have one CAS6 DIMM in the system, then might
as well have two of them. I drew the above diagram, in case the
top branch could operate a bit faster by itself.

> In any case, this discussion may be all moot, if what somebody else
> told me today on another forum is correct (this guy seems to know his
> stuff regarding memory, as you obviously do). He said that my system
> will run with the latency of the slowest DIMM installed in my system,
> no matter what all the other DIMMs are. Do you concur? Is there any
> way for me to find out?


In this Skulltrail review on HardOCP, the Intel board only seems to
have one setting for CAS, that applies to everything.

http://enthusiast.hardocp.com/image....8xMV9sLmdpZg==

The Skulltrail board is intended for enthusiasts, which is why that adjustment
screen is even present. On a server board, they likely wouldn't bother
making it adjustable (because server operators don't overclock stuff).

>
> I noted that when I run that CPUZ software that you recommended
> earlier... it has the following entry under the "Memory" tab (with the
> DIMMs installed as you noted above):
>
> CAS# Latency (CL) 6.0 clocks
> RAS# to CAS# Delay (tCRD): 6 clocks
> RAS# Precharge (tRP): 6 clocks
>
> Does this mean that it is monitoring the system as running at CAS6
> overall? If that's the case, then maybe it doesn't matter at all what
> order I install the DIMMs, and I might as well flip a coin to decide
> which one to install in which slot, and which ones to send back to
> Dell.


The memory tab is intended to show the current operating conditions.
The SPD tab is supposed to show the information recorded on the DIMM,
in the SPD EEPROM. It would have timing info for each stick, and
the menu at the top allows selecting the slots in turn. The BIOS
reads the SPD on all four slots, and then decides how to program
the Northbridge, and the (few) registers on the memory chips.

>
> Wait, here's something else I just discovered... In the product
> brochure for the Samsung DDR2 SSDRAM FBDIMMs...
>
> .., it lists the following under "Features":
>
> - Posted CAS
> - Programmable CAS Latency: 3, 4, 5, 6
>
> I don't see any other discussion anywhere in the technical documents
> about how this "programming" is accomplished (i.e., is it
> user-programmable, or is it shipped set locked at a particular latency
> from the factory, or does it set itself according to what it detects
> in my system?).
>
> If it is programmable, then I also don't understand why anybody would
> want to set it at a slower latency than its fastest setting. Maybe
> I'm just not understanding what they mean by "programmable" here.


It is programmable. Different values are used as a function of the clock
sent to the memory chip. The register might be set to CAS6 at DDR2-667
and CAS5 at DDR2-533. When the clock period changes, the CAS value
(measured in clock periods) can be adjusted for a constant time interval.

Memory did not always use clocks. The earlier DRAM designs made the
RAS and CAS signals "strobes" or pulses that jumped at just the right
time, to coordinate operations inside the chip. RAS was the Row Address
Strobe, CAS the Column Address Strobe, and the command/address bus was
multiplexed. Two addresses were presented, to index into the rectangular
arrangement of memory cells. Once CAS is presented, all the info to address
a given memory cell is present, and after waiting a "CAS latency" time,
the operation might be completed at the cell (like a read operation).

Say that time was 15 nanoseconds.

Now, move forward in time. DRAM now uses a synchronous clock scheme. Information
is transferred on a regular basis, based on clock edges. The same
things need to be done, namely giving X and Y addresses to index into
a rectangular array of memory cells. Say that the clock period was
5 nanoseconds. On a modern memory, we'd perhaps call that "CAS3" memory,
as 3 * 5 nanoseconds happens to be exactly 15 nanoseconds. Waiting
three cycles, means waiting for 15 nanoseconds, and that is just enough
time for the DRAM to respond.

Now, if we adjust the memory clock to a slower clock, like 6 nanoseconds,
then a CAS delay of 2.5 clock cycles would amount to the same time interval.
The product of the CAS number of cycles, and the cycle time, must be
greater than or equal to the delay number (the 15 nanoseconds). When the
SPD EEPROM is programmed, the programming is based on that 15 nanosecond
number, extracted from the memory chip datasheet.

(The example I just made up, is taken from the DDR generation, where
CAS was programmable in half integer steps. DDR2 and DDR3 changed that
to whole integer steps, which is where the 3,4,5,6 values you quote,
come from. Every technology has defined a reasonable minimum value,
so the register cannot be set to say one or zero cycles, or something
silly.)

It is the quantization of continuous time, into cycles, where the cycle
time may vary according to the application clock, that leads to the need to
program the CAS register.

Now, where is the programming done ? It is done to both the memory chips
on the DIMMs, but also done to the Northbridge. This is because, there needs
to be coordination between chips, so the chips don't "contend" and burn
one another, by driving the bus at the same instant. By timing things
like CAS latency in both the DRAM chip, and the Northbridge, the activities
can be coordinated, without yet another pin being needed on the IC.

When you turn on the computer, the memory chip control registers are not
programmed. The initial BIOS code, needs no memory. You can survive quite
nicely, on a diet of CPU internal registers. The memory and the Northbridge
memory controller are then set up. A special cycle is done to the memory,
to pass strap values, like a value for the CAS delay, to the memory chip.
That gets stored in an identical register in each memory chip in a rank
on the DIMM.

Once the memory is started, then the CAS value should not need to be changed
again. At least, until the initialization sequence is needed for the memory
again.

FBDIMMs add complication to that model, in that the serial channels that
carry packets, also have to be initialized and set up, before anything
can be done to the memory chips themselves. So the Northbridge talks
to the AMB, then eventually the BIOS can go via the AMB to ranks of
memory chips, and set them up. So the above description, is missing
any details about the steps to "discover" the AMB and set it up first.

HTH,
Paul

Reply With Quote
  #11 (permalink)  
Old 10-17-2008, 05:07 PM
Mike Walsh
Guest
 
Posts: n/a
Default Re: Best way to mix DIMMs of different CAS latencies?



Lothar of the Hill People wrote:
>
> On Thu, 16 Oct 2008 14:35:28 -0400, Mike Walsh
> <spam_sucks@bellsouth.net> uttered like so:
>
> >
> >
> >
> >Lothar of the Hill People wrote:
> >>
> >> One other thing... I have a 32-bit OS (Windows XP Pro), so only 3GB of
> >> my memory is available to the OS. Is the additional 1GB that is
> >> reserved for non-OS functions coming off of one dedicated DIMM, or is
> >> it being spilt among all 4?

> >
> >You can address only the first 3 GB of memory; the memory above 3 GB is not used at all.
> >The reason that you can use only 3 GB memory is the address space above 3 GB is use for other purposed; I have read that it is used to address other hardware devices such as PCI, PATA, etc..

>
> Thanks, Mike. I was under the impression that a 32-bit system *can*
> use more than 3GB (up to 3.5GB), depending on how the system is
> configured. I have another system with 4GB installed, and in the
> System Properties window it says that I have 3.25GB of RAM. A
> different system, with the same amount of memory installed, says that
> I have 3.0GB.


It depends how it is measured. The system that says 3 GB is using 2^30 (binary) bytes per gigabyte instead of 10^9 (decimal). The maximum memory that can be addressed is 3,221,225,472 bytes (3 x 2^30).

> I didn't realize that the leftover amount was completely unused for
> any purpose though.
>
> In any case, the question remains whether the unused memory is
> partitioned off into one entire 1GB DIMM, or are all 4 DIMMs are still
> partially used? In other words, is there any point at all to having 4
> 1GB DIMMs installed in a system that can only use 3GB, or can I remove
> one of them to keep it protected as a spare?


If the memory is addressed "normally" the fourth DIMM will not be used. If "dual channel" or some such scheme is used then half of each of the third and fourth DIMM will be used.

--
Mike Walsh

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  #12 (permalink)  
Old 10-17-2008, 05:47 PM
Lothar of the Hill People
Guest
 
Posts: n/a
Default Re: Best way to mix DIMMs of different CAS latencies?

On Fri, 17 Oct 2008 08:39:57 -0400, Paul <nospam@needed.com> uttered
like so:

>I'm assuming the chipset has four channels, your board has four DIMM
>slots, and the most logical assignment is one DIMM per channel. In
>fact, if Dell wanted, they could leave the bottom two channels unused,
>and connect two DIMMs to each of the upper channels. One of the
>early articles I read on the performance of these four channel systems,
>claimed they didn't see a change in memory bandwidth, between those
>two options, which at the time I didn't believe for one minute :-)
>
>If all four channels are used, they are split into two groups. Intel
>calls them branch0 and branch1. Branch0 contains the first two channels,
>to be operated in lockstep. Branch1 contains the second two channels,
>to be operated in lockstep. I don't see any mention in the Intel documentation,
>that all channels must operate in lockstep, but because I've designed
>hardware, I understand the need for simplicity, in the interest of
>reducing chip simulation and verification during design. Adding
>degrees of freedom to hardware, costs significant time and money.
>Our chip verification team was constantly behind schedule, and
>were still doing verification when the design was sent to fab.
>A little stupid, but that is how the game is played.
>
>So running them all at CAS6, makes a lot of sense. It is the
>fact that the Intel documentation did not go the extra mile, and
>say just that, that made me hedge my bets by drawing the above
>diagram. If you must have one CAS6 DIMM in the system, then might
>as well have two of them. I drew the above diagram, in case the
>top branch could operate a bit faster by itself.
>
>
>In this Skulltrail review on HardOCP, the Intel board only seems to
>have one setting for CAS, that applies to everything.
>
>http://enthusiast.hardocp.com/image....8xMV9sLmdpZg==
>
>The Skulltrail board is intended for enthusiasts, which is why that adjustment
>screen is even present. On a server board, they likely wouldn't bother
>making it adjustable (because server operators don't overclock stuff).
>
>
>It is programmable. Different values are used as a function of the clock
>sent to the memory chip. The register might be set to CAS6 at DDR2-667
>and CAS5 at DDR2-533. When the clock period changes, the CAS value
>(measured in clock periods) can be adjusted for a constant time interval.
>
>Memory did not always use clocks. The earlier DRAM designs made the
>RAS and CAS signals "strobes" or pulses that jumped at just the right
>time, to coordinate operations inside the chip. RAS was the Row Address
>Strobe, CAS the Column Address Strobe, and the command/address bus was
>multiplexed. Two addresses were presented, to index into the rectangular
>arrangement of memory cells. Once CAS is presented, all the info to address
>a given memory cell is present, and after waiting a "CAS latency" time,
>the operation might be completed at the cell (like a read operation).
>
>Say that time was 15 nanoseconds.
>
>Now, move forward in time. DRAM now uses a synchronous clock scheme. Information
>is transferred on a regular basis, based on clock edges. The same
>things need to be done, namely giving X and Y addresses to index into
>a rectangular array of memory cells. Say that the clock period was
>5 nanoseconds. On a modern memory, we'd perhaps call that "CAS3" memory,
>as 3 * 5 nanoseconds happens to be exactly 15 nanoseconds. Waiting
>three cycles, means waiting for 15 nanoseconds, and that is just enough
>time for the DRAM to respond.
>
>Now, if we adjust the memory clock to a slower clock, like 6 nanoseconds,
>then a CAS delay of 2.5 clock cycles would amount to the same time interval.
>The product of the CAS number of cycles, and the cycle time, must be
>greater than or equal to the delay number (the 15 nanoseconds). When the
>SPD EEPROM is programmed, the programming is based on that 15 nanosecond
>number, extracted from the memory chip datasheet.
>
>(The example I just made up, is taken from the DDR generation, where
>CAS was programmable in half integer steps. DDR2 and DDR3 changed that
>to whole integer steps, which is where the 3,4,5,6 values you quote,
>come from. Every technology has defined a reasonable minimum value,
>so the register cannot be set to say one or zero cycles, or something
>silly.)
>
>It is the quantization of continuous time, into cycles, where the cycle
>time may vary according to the application clock, that leads to the need to
>program the CAS register.
>
>Now, where is the programming done ? It is done to both the memory chips
>on the DIMMs, but also done to the Northbridge. This is because, there needs
>to be coordination between chips, so the chips don't "contend" and burn
>one another, by driving the bus at the same instant. By timing things
>like CAS latency in both the DRAM chip, and the Northbridge, the activities
>can be coordinated, without yet another pin being needed on the IC.
>
>When you turn on the computer, the memory chip control registers are not
>programmed. The initial BIOS code, needs no memory. You can survive quite
>nicely, on a diet of CPU internal registers. The memory and the Northbridge
>memory controller are then set up. A special cycle is done to the memory,
>to pass strap values, like a value for the CAS delay, to the memory chip.
>That gets stored in an identical register in each memory chip in a rank
>on the DIMM.
>
>Once the memory is started, then the CAS value should not need to be changed
>again. At least, until the initialization sequence is needed for the memory
>again.
>
>FBDIMMs add complication to that model, in that the serial channels that
>carry packets, also have to be initialized and set up, before anything
>can be done to the memory chips themselves. So the Northbridge talks
>to the AMB, then eventually the BIOS can go via the AMB to ranks of
>memory chips, and set them up. So the above description, is missing
>any details about the steps to "discover" the AMB and set it up first.
>
>HTH,
> Paul



Thanks for the detailed explanation, Paul, I found that very
educational!

I just have one correction to what you wrote in your first sentence
above... my board actually has 8 DIMM slots on it, not 4. Four of
them (#1-4) have white clips, and 4 (#5-8) have black. The first
four came populated from the factory, and #5-8 were empty.

So unless you feel otherwise after our latest round of discussion,
I'll go with your recommendation (if I understood you correctly) and
put CAS5 DIMMs in slots 1 & 2, and CAS6 DIMMs in slots 3 & 4, and
leave slots 5-8 empty.

With any luck though, maybe I'll get Dell to be able to swap the
CAS6's that they sent me with CAS5's, and then they'll all be the
same. It annoys the hell out of me that I've got this one-week-old,
extremely-expensive server workstation, and they've sent me
replacement DIMMs that are slowing down my memory from the
configuration that came from the factory! I almost feel like sending
the whole system back to them and telling them to give me another one
that's properly configured.

Lothar

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  #13 (permalink)  
Old 10-17-2008, 05:48 PM
Lothar of the Hill People
Guest
 
Posts: n/a
Default Re: Best way to mix DIMMs of different CAS latencies?

On Fri, 17 Oct 2008 13:07:30 -0400, Mike Walsh
<spam_sucks@bellsouth.net> uttered like so:

>It depends how it is measured. The system that says 3 GB is using 2^30 (binary) bytes per gigabyte instead of 10^9 (decimal). The maximum memory that can be addressed is 3,221,225,472 bytes (3 x 2^30).

<snip>
>If the memory is addressed "normally" the fourth DIMM will not be used. If "dual channel" or some such scheme is used then half of each of the third and fourth DIMM will be used.


Thanks very much, Mike, that answers my question nicely.

Lothar

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  #14 (permalink)  
Old 10-17-2008, 09:22 PM
Paul
Guest
 
Posts: n/a
Default Re: Best way to mix DIMMs of different CAS latencies?

Lothar of the Hill People wrote:

>
> Thanks for the detailed explanation, Paul, I found that very
> educational!
>
> I just have one correction to what you wrote in your first sentence
> above... my board actually has 8 DIMM slots on it, not 4. Four of
> them (#1-4) have white clips, and 4 (#5-8) have black. The first
> four came populated from the factory, and #5-8 were empty.
>
> So unless you feel otherwise after our latest round of discussion,
> I'll go with your recommendation (if I understood you correctly) and
> put CAS5 DIMMs in slots 1 & 2, and CAS6 DIMMs in slots 3 & 4, and
> leave slots 5-8 empty.


Sounds fine.

>
> With any luck though, maybe I'll get Dell to be able to swap the
> CAS6's that they sent me with CAS5's, and then they'll all be the
> same. It annoys the hell out of me that I've got this one-week-old,
> extremely-expensive server workstation, and they've sent me
> replacement DIMMs that are slowing down my memory from the
> configuration that came from the factory! I almost feel like sending
> the whole system back to them and telling them to give me another one
> that's properly configured.
>
> Lothar


I don't think it will make that much difference, but it is the
principle of the thing that counts. After all, if you compare
the prices of the CAS5 and CAS6 modules, I bet there is a
price difference. So you're receiving something of less value
in exchange, as the CAS6 should be cheaper for Dell to provide.

Paul

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  #15 (permalink)  
Old 10-17-2008, 10:02 PM
Lothar of the Hill People
Guest
 
Posts: n/a
Default Re: Best way to mix DIMMs of different CAS latencies?

On Fri, 17 Oct 2008 17:22:04 -0400, Paul <nospam@needed.com> uttered
like so:

>I don't think it will make that much difference, but it is the
>principle of the thing that counts. After all, if you compare
>the prices of the CAS5 and CAS6 modules, I bet there is a
>price difference. So you're receiving something of less value
>in exchange, as the CAS6 should be cheaper for Dell to provide.


That's my mindset exactly! Somebody sent me a benchmark report today
that suggests that I might only see a 0.002% decrease in performance
going from CAS5 to CAS6. But I did pay for the CAS5, and I just hate
to have to downgrade, for a brand-new system (and an extremely
expensive one at that). I'm sure I'll never notice any difference,
but it will always be gnawing at the back of my mind that I could have
had better. This is, after all, the fastest system that Dell
currently sells (unless I were to add more processors), so why skimp
on memory?

I was actually just informed by Dell a few minutes ago that they are
sending me a new set of 4 DIMMs (in addition to the 3 replacements
that they've already sent me), so that they will "all be the same,"
though they said there's no guarantee as to what the latency would be
of the latest batch. So I guess I have my pick of which ones I want to
install out of a total of 11 sticks (for 4 slots), and will send all
the rest back. Now I'm wondering if it will be better to just install
4 of the exact same DIMMs, even if they are slower, since they'll all
probably run at the same latency no matter how I do it.

I must say that Dell is being very accommodating to me, though I wish
they would just send me DIMMs that match the original latency. I hate
having to downgrade what I paid for.

With all the one-day shipping costs they're paying for to send me
these DIMMs (3 separate packages so far), and the return postage,
you'd think they could save themselves some expense by just making an
effort to send DIMMs that match what I originally had. I see that the
price for these DIMMs (if I were to fail to return any of them) is
only US$115 per stick, so how much more could it really cost them (at
their cost) to send me what I am asking for? $10, perhaps? Less,
after figuring in all the shipping waste? Isn't it worth that much to
keep a valuable customer happy?

Just venting, don't mind me... :-)

Lothar

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